eP9162S is a 2-Port DVI/HDMI 1.4b/HDMI 2.0a splitter with integrated HDCP 1.4 and HDCP 2.2 decryption/encryption engines. eP9162S receives DVI/HDMI 1.4b/HDMI 2.0a inputs, process HDCP 1.4 or HDCP 2.2 decryption and encryption again, then transmits the data to 2 DVI/HDMI 1.4b/HDMI 2.0a ports. The chip also supports HDCP 1.4 to HDCP 2.2 and HDCP 2.2 to HDCP 1.4 conversions.
Features
-On-chip HDMI Receiver and Transmitter core which are compliant with DVI 1.0, HDMI 1.4b and HDMI 2.0a specification
-On-chip HDCP RX/TX ciphers which are compliant with HDCP 1.4/2.2 specification
-Wide Frequency Range: 25MHz - 600MHz
-Support Jitter Clean capability for more cascadable stages
-Supports 12-bit Deep Full HD, Full 3D, HDR and 4K2K 60Hz video
-Supports 1 DVI/HDMI input port and 2 DVI/HDMI output ports
-Supports conversion of HDMI signalling to DVI/HDMI signalling
-Support HDCP 1.4 to HDCP 2.2 conversion
-Support HDCP 2.2 to HDCP 1.4 conversion
-Support on-chip 512 byte e-DDC eDID RAM for input port.
-Cascadable to make more than 2 output ports
-Provide companion HDCP 2.2 Controller (ePF025R) with integrated HDCP keys.
-100-pin TQFP ePAD package
Block Diagram
