3G, HD-, SD-SDI and DVB-ASI receiver, with built-in adaptive cable equalizer
The GS2971A is a multi-rate SDI integrated Receiver which includes complete SMPTe processing, as per SMPTe 425M, 292M and SMPTe 259M-C. The SMPTe processing features can be bypassed to support signals with other coding schemes.
The device operates in one of four basic modes: SMPTe mode, DVB-ASI mode, Data-Through mode or Standby mode.
In SMPTe mode (the default operating mode), the GS2971A performs full SMPTe processing, and features a number of data integrity checks and measurement capabilities.
The device also supports ancillary data extraction, and can provide entire ancillary data packets through host-accessible registers. It also provides a variety of other packet detection and error handling features. All of these processing features are optional, and may be individually enabled or disabled through register programming.
Both SMPTe 425M Level A and Level B inputs are supported with optional conversion from Level B to Level A for 1080p 50/59.94/60 4:2:2 10-bit inputs.
In DVB-ASI mode, sync word detection, alignment and 8b/10b decoding is applied to the received data stream. In Data-Through mode all forms of SMPTe and DVB-ASI processing are disabled, and the device can be used as a simple serial to parallel converter.
The device can also operate in a lower power Standby mode. In this mode, no signal processing is carried out and the parallel output is held static.
Parallel data outputs are provided in 20-bit or 10-bit format for 3Gb/s, HD and SD video rates, with a variety of mapping options. As such, this parallel bus can interface directly with video processor ICs, and output data can be multiplexed onto 10 bits for a low pin count interface.
Up to eight channels (two audio groups) of serial digital audio may be extracted from the video data stream, in accordance with SMPTe 272M-C and SMPTe 299M.
The output audio formats supported by the device include AeS/eBU and I2S, and two other industry standard serial digital formats. A variety of audio processing features are provided to ease implementation. Audio clocks are internally generated and provided by the device.
Features