eP92A3e is an HDMI/MHL 1.4 3-IN 1-OUT Repeater suitable for Home Theater and Bar Speaker applications. The chip supports 1 HDMI/MHL dual mode input port (Port 0) and 2 HDMI input ports (Port 1 and 2). The chip supports HDCP decryption, audio outputs, audio inputs and HDCP re-encryption in repeater mode. The chip supports SD/HD/DSD Audio in IIS and SPDIF format. The chip supports HD, 3D, and 4K2K Video up to 300 Mhz TMDS clock.
The chip is also integrated with an eFlash MCU. It manages HDMI, HDCP repeater, and handle all the GPIO control (DDC, HPD, +5V detect...) automatically without the need for user to develop firmware. The MCU provides the CeC physical layer transceiver and handles the protocol layer automatically that make user’s applications very easy.
Features
•On-chip HDMI/HDCP controller which manages HDMI and HDCP automatically without the need for user to develop firmware
•On-chip CeC controller which provides CeC Physical Layer Transceiver and handle the Protocol Layer without the need for user to develop firmware
•On-chip 3-IN 1-OUT HDMI/MHL Dual Mode Repeater with equalizer
•On-chip HDMI/MHL Receiver and Transmitter core which are compliant with HDMI 1.4 and MHL 2.0 specification
•On-chip HDCP engine which supports Repeater and is compliant with HDCP 1.4 specification
•On-chip eFlash MCU with integrated HDCP keys
•On-chip Audio Decoder which support 8-channel IIS/DSD and SPDIF audio outputs
•Supports Standard Audio, DSD Audio and HD (HBR) Audio
•Support ARC (Audio Return Channel) Receiving
•Support wide Frequency Range: 25MHz - 300MHz TMDS clock
•Supports 12-bit Deep Color Full HD, 3D and 4K2K video.
•Supports on-chip eDID RAM for Port 0, Port 1, and Port2
•Audio source for Repeater output can be from a regenerated LPCM audio source or the original audio from the selected Repeater input port.
•Supports audio soft mute
•Supports SPDIF Channel Status extraction
•Register-programmable via slave IIC interface
•Link On and Valid De Detection
•Controllable tri-state for Audio output pins
•Low stand-by current (< 1mA) at power down mode
•128-pin LQFP package
Block Diagram